Tabbed routing is increasingly used in DDR and other high‑speed designs to manage impedance, crosstalk, and signal‑integrity challenges, especially in dense pin fields and breakout areas. In this advanced webinar, we take a practical look at when tabbed routing makes sense, how it affects real signal behaviour, and what designers should consider when applying it in modern PCB layouts.
Sessions
Europe edition
Wednesday, 13 May 2026
10:00–11:00 AM CEST
USA edition
Wednesday, 13 May 2026
2:00–3:00 PM EDT
(11:00 AM–12:00 PM PDT)
What you will learn
- Key material and design factors affecting impedance in high‑speed PCB layouts
- What tabbed routing is and where it makes sense to use it
- Typical application scenarios in dense, high‑speed designs
- Simulation‑based insights and theoretical conclusions
- Practical handling of tabbed routing in design tools
- Live Q&A
Speaker
