FAQ about printed circuit boards
If you cannot find the answer you are looking for, or would like more details, then please contact us and we would be more than happy to assist.
AREA OF QUESTION
1. What is a microvia hole?
According to the new definition within IPC-T-50M a microvia is a blind structure with a maximum aspect ratio of 1:1, terminating on a target land with a total depth of no more than 0.25mm measured from the structure’s capture land foil to the target land.
2. What is meant by a blind via hole?
It is a hole that runs from an outer layer to the inner layer, but not through the entire PCB. These holes can be drilled mechanically or using laser technology.The image in point 1 shows a laser drilled blind via.
3. What is meant by a buried via hole?
This is a hole that runs between one or more inner layers. They are normally mechanically drilled.
4. What is a HDI PCB?
IPC-2226 defines HDI as a printed circuit board with a higher wiring density per unit area than conventional printed circuit boards (PCB). They have finer lines and spaces ≤ 100 µm / 0.10mm, smaller vias (<150 µm) and capture pads <400 µm / 0.40mm, and higher connection pad density (>20 pads/cm2) than employed in conventional PCB technology.
5. Are there different types of HDI features?
The graphic below shows the main structures – type I, type II and type III as defined in IPC-2226.
Type I. Defines a single microvia layer on either one or both sides of core. Uses both plated microvia and PTH for interconnection, employing blind, but not buried vias.
Type II. Defines a single microvia layer on either one or both sides of core. Uses both plated microvia and PTH for interconnection. Employs blind and buried vias.
Type III. Defines at least two layers of microvia on either one or both sides of core. Uses both plated microvia and PTH for interconnection. Employs blind and buried vias.
Construction terminology to define the degree of HDI construction:
- 1+n+1 = single layer of microvia (as per the type I and type II examples above)
- 2+n+2 = 2 layers of microvia (as per the type III example above)
- 3+n+3 = 3 layers of microvia
CATEGORY: DESIGN RULES
6. What is the minimum pad size hole on the outer/inner layer?
This varies from manufacturer to manufacturer, but in general you can say that the majority of manufacturers can produce them as follows:
A = 0.15 mm
B = 0.20 mm
C = 0.30 mm
For tighter constructions, please ask one of NCAB’s technicians for advice.
7. When I need thicker tracks than standard, which track widths can I use?
In general, the thicker the copper base, the wider the track should be. One rule of thumb is that with a 18 µm copper base the track should not be narrower than 0.1 mm (4 mil) and with a 105 µm copper base the track should not be narrower than 0.25 mm (10 mil).
8. How much finished copper can be expected?
There is a misperception that copper weights offer certain exact thicknesses and that these do not reduce during the production of a PCB. For example 1 oz. = 35um or ½ oz. = 18um.
However IPC-6012 detailed the acceptable minimum thickness of both copper fpoils and foils after plating based upon allowable tolerances of copper foils and reductions of plating copper during subsequant processing.
Below shows some the more standard copper weights and allowable finished thickness.
As such such it is critical to understand what you need and specify correctly – if not then you may under-specify or you may over-specifiy which can lead to excess costs being built into the design. For more information, please consult our technicians.
|Inner layer foil thickness after processing|
|Base copper weight||Minimum finished after processing|
|1/2 oz.||11.4 um|
|External conductor thickness after plating and processing|
|Base copper weight||Minimum finished after processing Class 2||Minimum finished after processing Class 3|
9. What is the “aspect ratio”?
The relationship between the diameter of the hole and its length. When a manufacturer states that their production has an “aspect ratio” of 8:1 it means, for example, that the hole’s diameter is 0.20 mm in a 1.60 mm thick PCB.
For HDI structures, a suitable aspect ratio for microvia is normally 0.8:1, with 1:1 preferable for ease of plating.
10. What is copper wrap?
Copper wrap is a continuous deposit of plated copper that is deposited within the barrel of the hole and extends onto the surface of the PCB (or the surface of the innerlayer core if part of a HDI structure) by a minimum of 25 um.
For class 2 demands the thickness of the surface deposit of the caopper wrap is minimum 5um, but for class 3 demands this will vary dependant upon where this feature is situations within the build. Please consult our technicians for further information on class 3 demands.
CATEGORY: VIA HOLE
11. What type of via hole plugging is recommended?
The preferred type of plugging for standard product (not including capped via hole) is IPC 4761 type VI filled and covered, with target being complete fill. The image below shows type VI with liquid soldermask coverage.
Single sided plugging is not recommended (including type II tented and covered) due to concerns over entrapment of chemistry or likelihood of solderballs being present with HASL finishes (LF and SnPb).
12. What is a capped via hole?
A capped via is when plating is added over the via hole so that the surface is fully metalised with a minimum copper / cap plating thickness of 5um for class 2 demands, or 12um for class 3 demands.
This is reliant upon the via filling material being epoxy resin as opposed to soldermask, as the epoxy will minimise the risk of air bubbles or expansion of the fill during soldering operations.This can be categorised within IPC-4761 as type VII – filled and capped via holes. It is typically used for designs with via in pad or in BGA applications where high density features are required.
13. Do I have to use an FR4 material with a high Tg (Tg = glass transition temperature) for lead-free soldering?
No, not necessarily. There are many factors to be taken into account, e.g. how many layers, the thickness of the PCB and also a good understanding of the assembly process (number of soldering cycles, time above 260 degrees, etc.). Some research has shown that a material with a “standard” Tg value has even performed better than some materials with a higher Tg value. Note that even with “leaded” soldering the Tg value is exceeded.
What is of most importance is how the material behaves at temperatures above the Tg value (post Tg) so knowing the temperature profiles the board will be subjected to will help you look evaluate the necessary performance characteristics.
14. What are the material characterisics to look for when selecting material?
The main ones that we would consider first include:
A measure of how much the material expands when heated. Critical in Z-axis – typically above Tg and the expansion is greater. If CTE insufficient for then failures can occur during assembly as the material expands rapidly above Tg.
Left image: Barrel crack/broken hole Right image: Lifted land
Materials can have same Tg yet different CTE’s – lower CTE is better. Equally some materials can have higher Tg values, yet also have a higher (worse) CTE post Tg.
Tg / GLASS TRANSITION TEMPERATURE
The Tg value is the temperature at which the material changes from a reasonably stiff glass-like material to a more elastic and bendable plastic-like material. Important as above Tg, the materials properties will change.
Td / DECOMPOSITION TEMPERATURE
This is a measure of the degredation of the material. The analysis-method measures when 5 % of the material is lost by weight – the point as which reliability is compromised and delamination may occur.
Higher reliability PCB will require Td ≥ 340℃
Degradation of epoxy resin within FR4.
T260 / T288 / TIME TO DELAMINATION
This is the method to determine the time when the thickness of the PCB is irreversibly changed at a predefined temperature (260 or 288 in this case)– i.e. when the material expands to such a degree that it delaminates.
15. Do I have to use an FR4 material with the highest Td (Td = decomposition temperature) for lead-free soldering?
A greater Td value is preferable, especially if the board is technically complex and exposed to a number of remelting solderings, but this can lead to higher costs. Knowing your assembly process can help make the right choices.
16. What is the difference between “Dicy” and “nonDicy” as a hardening system in the FR4 epoxy?
Dicy (Dicyandiamine) is by far the most common hardening system for this epoxy; it normally gives a Td value of about 300–310°C while a “nonDicy”, i.e. a Phenolic Cured Epoxy has a Td value of about 330–350°C and can therefore better resist the higher temperature.
17. What does “CAF” mean?
CAF (Conductive Anodic Filament) means that there will be an electrochemical reaction between the copper anode and cathode, which may result in an internal short circuit in the material.
18. Which PCB surface is best for lead-free soldering?
There is no “best surface”; all surfaces have their pros and cons. Which one you should choose depends on many factors. Please consult our technicians or review the information on surface finishes within this section of the website.
19. What are the rules regarding flame retardants, was there a national ban against TBBP-A which dominates in electronics?
No, the investigation found that it is, for practical reasons -not possible to ban.
20. What is the difference between flame retardant added in reactive or additive form?
Reactive flame retardant is chemically bound to the epoxy and will not dissolve and migrate out of the product as part of the waste deposit.
21. How many reflow cycles can FR4 materials withstand?
It is hard to give a precise answer, but we have made tests with material with up to 22 reflows, four of these with a peak temperature of 270C°. The stress after 22 reflows is considerable and material can degrade, but all connections remained functional.
Our recommendation is to choose a higher grade material where there are more than 6 layers and thicker than 1.6 mm.
|FR4 test board following multiple reflows|
22. Do the RoHS or WEEE directives require the PCB to be marked?
No, but for practical reasons PCBs that have lead-free HASL should be clearly marked stating their RoHS compatibility due to the risk of confusion with leaded HASL.
23. Are RoHS compatible PCBs also halogen-free?
No, not necessarily. The RoHS directive prohibits two bromided flame retardants, PBB (polybromided biphenyls) and PBDE (polybromided diphenyl ethers). What is normally used in PCBs is a bromided flame retardant called TBBP-A (Tetrabromobisphenol A).